Sample preparation apparatus and method

ABSTRACT

A apparatus and method for forming windows in semiconductor devices to enable visualization of the circuitry therein while electrically intact. The device is affixed to a table that is oscillated in the X and Y directions while a succession of rotating tools are brought to bear against the surface of the device in the Z direction under a constant force. The force is adjustable so as to allow the tool to float on the surface of the workpiece.

BACKGROUND OF THE INVENTION

[0001] The present invention is directed to an apparatus and method forpreparing semiconductor devices for analysis and more specificallypertains to the creation of transparent inspection windows in chips topermit examination of their circuitry while fully functional.

[0002] Semiconductor devices are typically encapsulated in resin orceramic which serves to protect the device and to positively fix inposition the conductor leads that extend therefrom. The resin or ceramiccapsule serves as a hermetically sealed barrier that has high mechanicalstrength and is substantially impervious to most chemicals. In order toconduct construction analysis and failure analysis it is absolutelyessential for such encapsulation, or at least a portion of suchencapsulation, to be removed. Moreover, it is necessary for theintegrity and full functionality of the chip to be maintained despitesuch decapsulation.

[0003] Various techniques have been developed for use in evaluating thestructure and functions of a semiconductor chip. For example, an imageemission microscope may be employed to localize defects in integratedcircuits. The utility of the emission microscope is based on theprinciple of recombinant radiation. In excess current drawing conditionssuch as occur during semiconductor failure modes, electrons and holes insilicon, recombine and relax, giving off a photon of light which isreadily detectable by specialized intensified CCD sensors. Suchemissions are non-isotropic and therefore radiate toward the front aswell as the back of the die. The predominant value of the technique israpid detection and failure localization to the junction level of asingle transistor in integrated circuits which may include up to4,000,000 or more transistors. Infrared and thermal techniques have alsobeen developed for the purpose of inspecting chips and identifyingfailures. Common to all such visualization techniques is the fact thatthe silicon in the chip acts as a filter for such radiation, and musttherefore be thinned in order for a sufficient degree of transparency tobe achieved. Gaining access to the silicon die for the purpose ofthinning further requires that the plastic encapsulation be removed.

[0004] Various decapsulation (or depacking) techniques have beendeveloped in order to gain access to the underlying chip along withtechniques with which the thickness of the silicon die can then bereduced. Heretofore used approaches are however all subject to variousshortcomings. Planar lapping with diamond slurries allows the requisitethinning to be achieved but because the entire device is lapped, theleads must be bent out of the way and once the lead frame becomesthinned, the leads cannot be bent back to their original configurationwithout breakage. This in turn precludes socket testing which poses aconsiderable hardship especially when high lead count devices areinvolved. Additionally, because the entire wafer must be thinned to thedesired depth, the structural integrity of the device becomes severelycompromised which renders the subsequent handling and testing of thedevice difficult. Reagent thinning is possible, but only hydrofluoricacid is capable of effectively dissolving the silicon and hydrofluoricacid is extremely hazardous. Dimpling techniques have also been employedwherein a slow speed grinding wheel extending from a weighted head isspun against the workpiece which is also being slowly spun. This resultsin a bowl shaped cut known as a dimple having a flat area surrounded bya radiused edge. The inspection area is therefore limited as the regionsoutside the flatspot abruptly lose contrast due to increasing siliconthickness. Radiused edges cannot be avoided using this technique andlarger flat spots can only be achieved by boring successively larger“test holes.” The technique is extremely time consuming and can takehours to cut through the packaging material and silicon. Ion millingtechniques employing a focused ion beam have also been used with somesuccess but are very slow and only capable of milling out a very tightlydefined small area which requires detailed knowledge of the failuresite. Such equipment is extremely expensive and requires the work to beperformed under a high vacuum. Conventional milling techniques areeffective for removing the packaging material but attempts to thin thedie typically leads to chipping, gouging and cracking. Even at lowerspeeds, with the die supported by molding compound, the die tends toshatter. Modification of conventional milling techniques tosubstantially increase torque and rotational speeds (40,000 to 60,000rpm) has been found effective to address the problem of breakage but theheat generated by such approach is substantial and requires the use ofcomplex and bulky cooling equipment to prevent damage. Additionally, theextremely high precision with which the position of the cutting toolmust be controlled requires the reliance on expensive CNC capability.

[0005] An improved approach is therefore needed with which access to thecircuitry in packaged microchips can be gained relatively quickly andeasily using relatively simple and inexpensive machinery.

SUMMARY OF THE INVENTION

[0006] The apparatus and method of the present invention provides animproved approach for thinning selected portions of semiconductordevices so as to render them transparent to infra-red light and therebyenable failure analysis to be carried out using emission microscopy(photon and thermal) as well as infra-red microscopy. The presentinvention provides for the thinning of an isolated portion or ofportions of the backside of packaged devices so as to preserve wiringexternal to the die intact. The apparatus and method can alsoeffectively be used to gain access to the front side of certain devicesincluding circuit delayering. The thinning may be accomplished inpackaged semiconductor devices as well as of single dies (or smallgroups of dies) and of specific areas on multi-chip modules.

[0007] The present invention provides for the controlled grinding andpolishing of the targeted areas so as to remove a very precise amount ofmaterial in a minimal amount of time while at the same time minimizingthe generation of heat. Elements of polishing and milling techniques arecombined to prevent the semiconductor device from being heat damagedwithout the need for complex cooling equipment to thereby greatly reducecost and complexity. Moreover, the invention provides a degree ofprecision and reproducibility in the formation of an access window in asemiconductor device that had not previously been available.

[0008] The invention provides for the oscillation of the semiconductordevice in the X-Y plane while a sequence of rotating tools are appliedagainst the device along. The tools are rotated about the Z axis andfloat along such axis to engage the workpiece under a selectableconstant force. The configurations of the tools are selected as afunction of the composition of the particular material of thesemiconductor device that is to be removed. The force with which aselected tool is brought to bear against the surface of the materialdevice remains constant and a broad range of forces is available forselection. Those tools that are applied under a relatively lightconstant force have a radial surface with which material is removedwhile the tools that are rotated at relatively high constant force havea circumferential surface with which material is removed. The apparatusof the present invention allows the force that is applied to be quicklyand easily adjusted and allows the speed of rotation to be adjusted.Additionally, the apparatus includes an oscillating table component towhich the semiconductor device is positively affixed. The amplitude ofthe oscillations is adjustable. The tilt of the table is also adjustableabout both the X direction and Y direction, to compensate for commonangular error in the assembly operation so as to maintain the planarrelationship between the working surface of the tool and the workpiece.

[0009] Prior to the actual removal of material from a semiconductordevice, a device identical to the sample may be cross-sectioned in orderto ascertain the identity, position and thicknesses of its variouscomponents. The appropriate tool and mode of operation can then beselected in order to remove the various layers without damaging thedevice or tools in as quick and as efficient manner as possible. Thepackaging material and substrate material is removed with the use ofdiamond polishing tools wherein the face of the rotating tools serve toremove material. Removal of certain intervening layers, such as thecopper paddle material, requires a switch to a milling tool with whichmaterial is removed by its circumferential surface. The tilt of thetable is adjusted when an interface between two layers is reached. Anydivergence from a perpendicular orientation of the device with respectto the Z axis will be apparent as an area less than the total areadefined by the X and Y oscillation will be revealed when the interfaceis first broached. The tilt of the table must then be adjusted such thata more even incursion into the successive layer is achieved. Finalpolishing is achieved with the use of a succession of various polishingtools in conjunction with abrasive pastes and extender fluids.

[0010] These and other features and advantages of the present inventionwill become apparent from the following detailed description of apreferred embodiment which, taken in conjunction with the accompanyingdrawings, illustrates by way of example the principles of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS

[0011]FIG. 1 is a schematic illustration of the apparatus of the presentinvention;

[0012]FIG. 2 is a greatly enlarged, partially cut-away view of asemiconductor device;

[0013]FIG. 3 is a greatly enlarged, cross-sectional view taken alonglines 3-3 of FIG. 2; and

[0014]FIG. 4 is a greatly enlarged perspective view of sample preparedin accordance with the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] The apparatus and method of the present invention provide for thepreparation of semiconductor devices for construction or failureanalysis which may employ any of a number of visualization techniques.The Figures generally illustrate the apparatus of the present inventionwith which the method may be practiced.

[0016]FIG. 1 is a schematic representation of the sample preparationapparatus 12 of the present invention. The apparatus includes a tilttable 14 for supporting a semiconductor device 16 and for oscillatingthe supported sample in the X and Y directions. Clamps 18 are attachableto the table for positively fixing the sample in position. Two drivemotors are disposed in the base element 20 of the apparatus and serve tooscillate the table as is well known in the art. Both the speed and theamplitude of the oscillations in the X and Y directions areindependently adjustable via controller 22. The oscillations in bothdirections are run in a criss-cross pattern. A pattern ratio of 7.5:1assures an overlap of successive passes while a return delay at each endof the X excursion provides for straight 90 degree sides. In the eventthat the die dimension corresponds to a multiple of 7.5, the workpieceis merely turned by 90 degrees. A tool 24 held in a chuck 26 is rotatedat an adjustable speed by the head element 28 which is movable in the Zdirection. The speed of rotation is adjustable via input from controller22. The head element is free to float in the Z direction wherein theforce of gravity serves to exert a constant force on the tool 24 againstthe sample 16. Additional weight 34 can be added to the head in order toselectively adjust the force exerted by the tool on the sample. Thedownward movement of the floating head is ultimately limited by a stopelement 36 which is adjustably positionable along the vertical supportcolumn 32. The tilt table 14 includes a mechanism as is well known inthe art for allowing the actual support surface 38 to be tilted in twodimensions. For example, top surface 38 may include a pivot 40, alignedwith the X axis, in combination with an adjustment screw 42 that allowsthe clearance between one end of the table a surface and a surface therebelow to be adjusted in addition to a second pivot 44, aligned with theY direction, and a second adjustment screw 46 that allows the clearancewith the surface there below to be adjusted.

[0017]FIG. 2 is a greatly enlarged, partial cutaway view of asemiconductor device 48. The particular device that is shown includes adie 50 that is encapsulated within a plastic package 52. The silicon dieincludes a frontside 54 and a back side 56 wherein leads 58 extend fromthe circuitry (not visible) formed in the front side of the die throughthe encapsulation to the exterior of the device. Semiconductor devicesvary greatly in terms of their internal structure including, but notlimited to, the composition and number of different encapsulationlayers, the size, orientation and thickness of the die, the position,orientation and configuration of the leadframe, etc. FIG. 3 is a greatlyenlarged cross-sectional view of a semiconductor device as is shown inFIG. 2. The encaspsulation 52 is shown as including two layers 58, 60 ofdifferent materials while a layer of copper 62 extends between theencapsulation 52 and the backside 56 of the die 50. Alternatively, thesemi-conductor device to be analyzed by the method and with theapparatus of the present invention may be devoid of encapsulation.

[0018] The method of the present invention initially calls for thecross-sectioning of a sample similar to the sample to be subject tofunctional analysis in order to allow the position, dimensions andorientation of the die to be ascertained as well the composition anddimensions of the various layers of the device. This subsequently allowsthe proper selection of the type of tool, mode of operation, speeds andloads to be made for the various depths of operation.

[0019] For accessing the backside 56 of a semiconductor device 48, thesample 16 is first clamped 18 or otherwise affixed, double-sided tapebeing adequate for most packages, to the support table 14 such that thebackside is extending upwardly. The sample is positioned such that sweepcenter of the table is aligned with the approximate center of the areaof interest of the internal circuitry within the device. The amplitudesof oscillation both in the X direction as well as the Y direction aresubsequently selected such that an area that corresponds to the entirearea of interest is processed. Once the X and Y parameters are set, nofurther alteration thereof will be required throughout the entireprocedure. In order to grind through most encapsulation materials adiamond tool 24 is selected wherein the tool has an abrasive surfaceformed on its distal radial surface. A typical speed of rotation, not toexceed about 6000 rpm, merely requires the addition of a drop or two ofwater to ensure adequate cooling. The head element 28 of the apparatus,and consequently the tool, is free to float along the Z axis andgradually grind down the surface of the workpiece material. The forcewith which the tool engages the sample is determined as is appropriatefor the composition of the encapsulation material, the grit size of theselected too, the diameter of the tool and the speed of rotation,wherein weight 34 is added to the head element as necessary. Removal ofthe encapsulation may be accomplished in steps wherein the stop 36 isreset after a measurement is taken to ensure that the grinding tool willnot impinge on the underlying copper layer. Running a diamond tool intocopper would of course foul the tool and render it ineffective forfuture use. As the copper layer becomes exposed, any tilt will bereadily become apparent as an area of copper less than the area definedby the X and Y amplitudes will become visible. Adjustment of the tiltscrews 42, 46 will then be necessary in order to establish parallelismand complete the removal of the encapsulation.

[0020] Subsequent removal of a copper layer will require the use of amilling tool, configured for removing material by contact with itscircumferential surface rather than with its distal radial surface.Additionally a maximum amount of weight 34 will be applied to the headwhereby the head will in effect be locked against the stop 36 positionedat a preselected depth within the copper layer. Drops of oil rather thanwater are used during the milling operation to ensure adequate cooling.The copper material will be removed along the set depth rather than downto the set depth as per the previous step. Removal of the copper layermay again be accomplished in steps wherein a preselected portion of thetotal depth of the copper is removed and its removal confirmed 25-50 umat a time.

[0021] Once the copper paddle has been removed and the silicon die hasbeen reached, it is again necessary to fit a diamond tool wherein theabrasive surface is formed on its distal radial surface and the forcewith which the tool is brought to bear against the workpiece isadjusted, by the removal of an appropriate amount of weight, such thatthe tool floats on the surface of the workpiece. Setting of theappropriate speed of rotation of the tool, force on the tool and thespeed of oscillation of the table along with the addition of a few dropsof water will ensure that the silicon will be removed without damagingthe die. Removal should again be accomplished in sets, wherein the stop36 is readjusted after each depth measurement until a depth to withinabout 150 to 175 um of the front side is achieved. Removal to withinabout 125 um is achieved with the use of a tool having a distal radialsurface of xylem and an abrasive paste. Addition of a few drops ofmineral oil may be necessary in order to ensure proper removal of thesilicon material.

[0022] Once a depth of about 125 um of the frontside of the die isachieved, it is necessary to polish the ground away surface to a highluster. The xylem tipped tool in combination with finer and finer gritabrasive paste may be used as well as tools with a leather orpolyurethane surface. Various polishing agents may be used includingcolloidal silica.

[0023] Once the target depth has been reached and a satisfactory surfacesmoothness has been achieved, the sample is ready for testing. As isshown in FIG. 4, the backside of the semiconductor device 48 will have awindow 64 formed therein having a base 66 which consists of the thinnedbackside of the silicon die through which the circuitry formed on thefront side of the die is visualizable using any of various visualizationtechniques well known in the art. The leads 58 are inserted into anappropriate socket or otherwise energized and the functions of thesemiconductor may be analyzed.

[0024] While a particular form of the invention has been illustrated anddescribed, it will also be apparent to those skilled in the art thatvarious modifications can be made without departing from the spirit andscope of the invention. The large variation in the construction ofsemiconductor devices require the details of the method to be tailoredaccordingly. The selection of the appropriate tools, oscillation rates,head preload, abrasive media, cooling media and removal rate to achievethe quickest removal without damaging the device is best determined byexperimenting with a similar samples. Accordingly, it is not intendedthat the invention be limited except by the appended claims.

What is claimed is:
 1. A method for removing a selected portion of asemiconductor device so as to enable visualization of its circuitrywhile said device is electrically intact, comprising the steps of:oscillating said semiconductor device in an X and a Y direction, said Xand Y directions defining a plane and wherein said semiconductor deviceis oscillated in preselected amplitudes along said X and Y directions soas to define an area that is less than the area defined by the peripheryof said semiconductor device; and rotating a first tool at less than6000 rpm about a Z axis that is perpendicular to said plane and engagingsaid semiconductor device with a distal radial surface of said tool witha constant force that is aligned along said Z axis, wherein said axialsurface is configured for removing first preselected layers of saidsemiconductor device.
 2. The method of claim 1, wherein saidsemiconductor device is encapsulated and wherein one of said firstpreselected layers comprises a portion of said encapsulation.
 3. Themethod of claim 1, wherein said semiconductor device includes a silicondie and wherein one of said first preselected layers comprises a portionof said silicon die.
 4. The method of claim 1, wherein said axialsurface of said first tool has a diamond abrasive disposed thereon. 5.The method of claim 1, wherein said axial surface of said first toolcomprises wood.
 6. The method of claim 1, wherein said axial surface ofsaid first tool comprises leather.
 7. The method of claim 1, whereinsaid axial surface of said first tool comprises polyurethane.
 8. Themethod of claim 1, further including the steps of cross-sectioning saidsemiconductor device and measuring the thicknesses of its layers so asto enable appropriate selection of said axial surface of said first toolto be made.
 9. The method of claim 8, wherein said constant force isapplied along said Z axis to preselected depths in said layers.
 10. Themethod of claim 1, further comprising the steps of: rotating a secondtool at less than 10,000 rpm about said axis and locking said tool intoa preselected position along said Z direction in engagement with saidsemiconductor device wherein said tool has a circumferential surfaceconfigured for removing second preselected layers of said semiconductordevice; and oscillating said semiconductor device in said X and Ydirections at said preselected amplitudes.
 11. The method of claim 10,wherein said semiconductor device includes a copper paddle and one ofsaid second preselected layers include a portion of said copper paddle.12. The method of claim 10, further including the steps ofcross-sectioning said semiconductor device and measuring the thicknessesof its layers so as to enable proper selection of said first and secondtools.
 13. The method of claim 1, further including the step of tiltingsaid semiconductor device such that said plane is parallel with a planedefined by the interfaces of its layers.
 14. An apparatus for removing aselected portion of a semiconductor device so as to enable visualizationof said device while its circuitry is electrically intact, comprising: atable for supporting a semiconductor device, said table beingoscillatable in an X and a Y direction to define a plane and atpreselected amplitudes in said X and Y directions; a floating head forrotating a chuck about a Z axis while applying a constant force alongsaid Z axis, wherein said Z axis is perpendicular to said plane; and atool having an axial surface configured for removing portions of saidsemiconductor device.
 15. The apparatus of claim 14, wherein said amountof constant force that is applied along the Z axis is adjustable. 16.The apparatus of claim 15, further comprising an adjustable stop toprevent said constant force from being applied beyond a preselectedposition along said Z axis.
 17. The apparatus of claim 14, wherein saidamplitudes in said X and Y directions are adjustable.
 18. The apparatusof claim 14, wherein said table is tiltable about said X and Ydirections.